ARNOS INSTRUMENTS & COMPUTER SYSTEMS, INC.
A486-25/33/50C
Processor |
80486SX/80487SX/80486DX/80486DX2 |
Processor Speed |
25/33/50(internal)/50/66(internal)MHz |
Chip Set |
AIC |
Max. Onboard DRAM |
64MB |
Cache |
64/128/256/512/1024KB |
BIOS |
AMI/Phoenix |
Dimensions |
264mm x 219mm |
I/O Options |
None |
NPU Options |
4167 |
CONNECTIONS | |||
Purpose |
Location |
Purpose |
Location |
External battery |
X8 |
Turbo switch |
X15 |
Reset switch |
X13 |
Speaker |
X16 |
Turbo LED |
X14 |
Power LED & keylock |
X17 |
USER CONFIGURABLE SETTINGS | |||
Function |
Jumper |
Position | |
» |
Battery select internal |
S3 |
pins 1 & 2 closed |
Battery select external |
S3 |
pins 2 & 3 closed | |
» |
Battery type select 5VDC or less |
S4 |
pins 1 & 2 closed |
Battery type select greater than 5VDC |
S4 |
pins 2 & 3 closed | |
» |
External cache enabled |
S5 |
open |
External cache disabled |
S5 |
closed | |
» |
CPU speed select iOSC/2 |
S7 |
pins 1 & 2 closed |
CPU speed select iOSC/1 |
S7 |
pins 2 & 3 closed | |
» |
Monitor type select color |
S8 |
closed |
Monitor type select monochrome |
S8 |
open |
CPU TYPE CONFIGURATION | ||
CPU Type |
S6 |
S9 |
80486DX2 |
pins 1 & 2 closed |
pins 1 & 2 and 3 & 4 closed |
80486DX |
pins 1 & 2 closed |
pins 1 & 2 and 3 & 4 closed |
80487SX |
pins 2 & 3 closed |
pins 1 & 2 and 3 & 4 closed |
80486SX |
open |
pins 2 & 3 closed |
DRAM CONFIGURATION | ||
Size |
Bank 0 |
Bank 1 |
1MB |
(4) 256K x 9 |
NONE |
2MB |
(4) 256K x 9 |
(4) 256K x 9 |
4MB |
(4) 1M x 9 |
NONE |
8MB |
(4) 1M x 9 |
(4) 1M x 9 |
16MB |
(4) 4M x 9 |
NONE |
32MB |
(4) 4M x 9 |
(4) 4M x 9 |
64MB |
(4) 16M x 9 |
NONE |
CACHE JUMPER CONFIGURATION | |||||
Size |
S1 |
S2 |
S10 |
S12 |
S13 |
64KB |
pins 1 & 2 |
pins 1 & 2 |
pins 1 & 2 |
pins 1 & 2 |
pins 1 & 2 |
128KB |
pins 2 & 3 |
pins 1 & 2 |
pins 2 & 3 |
pins 1 & 2 |
pins 2 & 3 |
256KB |
pins 2 & 3 |
pins 1 & 2 |
pins 2 & 3 |
pins 2 & 3 |
pins 1 & 2 |
512KB |
pins 2 & 3 |
pins 2 & 3 |
pins 2 & 3 |
pins 2 & 3 |
pins 1 & 2 |
1024KB |
pins 2 & 3 |
pins 2 & 3 |
pins 2 & 3 |
pins 2 & 3 |
pins 2 & 3 |
Note:Pins designated should be in the closed position. |
CACHE CONFIGURATION | |||
Size |
Cache |
Location |
TAG |
64KB |
(8) 8K x 8 |
Banks 0 & 1 |
(2) 8K x 8 |
128KB |
(4) 32K x 8 |
Bank 0 |
(2) 8K x 8 |
256KB |
(8) 32K x 8 |
Banks 0 & 1 |
(2) 32K x 8 |
512KB |
(4) 128K x 8 |
Bank 0 |
(2) 32K x 8 |
1024KB |
(8) 128K x 8 |
Banks 0 & 1 |
(2) 128K x 8 |